AMD’s Enthusiast Radeon RX 8000 GPUs Allegedly Featured MCM Navi 4C “RDNA 4” Chips

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AMD is alleged to have used its Navi 4C “RDNA 4” MCM GPUs to power the next-gen Radeon RX 8000 lover graphics cards.

AMD Navi 4C “RDNA 4” MCM GPUs Are Rumored To Be Part of The Now Defunct Radeon RX 8000 Graphics Cards

You may have seen the recent story where it was rumored that AMD canceled its high-end RDNA 4 GPUs if you have actually been reading our current stories. Well, it appears like Moore’s Law is Dead might have some additional information on a specific SKU that was suggested to be part of the new GPU lineup however was slashed out in favor of more mainstream GPUs.

MLID has published a supposed diagram of what seems to be a Navi 4C GPU which was to be among the three Navi 4 setups based on the RDNA 4 architecture with the other two being Navi 4X and Navi 4M, as revealed by Kepler_L2 a couple of months back. The Navi 4C configuration mainly seems a very sophisticated MCM (Multi-Chip-Module) design that utilized different foundation.

The base layer of the AMD Navi 4C (RDNA 4) GPU was the package substrate that would hold numerous AID’s and MID’s on top of it. The AID is an active interposer pass away and there are 4 of those which are accompanied by a single MID or Multimedia & I/O pass away which was supposed to be similar to the MCD included on the existing Navi 31 and Navi 32 MCM GPUs. This chiplet consisted of the VRAM bus controllers and the Infinity Cache along with other multimedia capabilities. The MID linked to the AID using a next-gen adjoin material and the AIDs were likewise adjoined to each other utilizing the exact same material.

Now for each AID, there were 3 SED’s layered on top in a stacked chiplet setup. These SED’s (Shader Engine Die) were the primary GPU IP obstructs performing the shader tasks. The diagram reveals that there were at least 9 SED’s on this Navi 4C configuration based on the RDNA 4 graphics architecture. The whole plan was based upon TSMC’s COW-V TSV (Chip-On-Wafer) technology and was going to include a number of setups however considering that we do not learn about the exact setup or CU/WGP design of RDNA 4, it’s prematurely to state what this chip may’ve been used for. You can also discover the reference of SED, AER, and MID’s in this patent here which the following diagrams are from:

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