TSMC Boosts AI Packaging Capacity To 15,000 Wafers Per Month Says Report

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The Taiwan Semiconductor Manufacturing Company (TSMC) has actually increased its Chip-on-Wafer-on-Substrate (CoWoS) capability in reaction to strong orders from NVIDIA Corporation, according to provide chain reports in Taiwan. TSMC, the world's biggest agreement chip producer, is a crucial NVIDIA supply chain partner for the latter's innovative expert system chips and likewise among the essential traffic jams due to capability restrictions for its product packaging innovation. Product packaging is a crucial part. of the chip fabrication procedure, and it includes preparing the items for last usage after fabrication.

NVIDIA's production restraints are thought to be an essential restraint in its capability to scale up orders to fulfill the enormous need for its items. This has likewise made it possible for a few of its rivals to take orders far from NVIDIA, and today's reports recommend that TSMC has actually bumped up its CoWoS capability to 15,000 wafers monthly.

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NVIDIA Believed to Account For 40% of TSMC's Total CoWoS Production Capacity Say Supply Chain Sources

A rise in NVIDIA's orders has actually led TSMC to increase its CoWoS capability through a procedure that was begun previously this year. Reports from TSMC's supply chain have actually formerly explained that it may increase its CoWoS product packaging capability to 30,000 wafers each month by the end of this year. While this may show to be a significant boost, another report today shares that the capability has actually been increased to 15,000 wafers after a late September report shared that TSMC had actually prepared to improve its capability to sit in between 15,000 and 20,000 wafers by the very first half of 2024.

TSMC deals with numerous business to source out orders for its product packaging devices, consisting of huge ticket Taiwanese semiconductor names such as ASE and the United Microelectronics Corporation (UMC). the set had actually currently gotten brand-new orders in September.

This uptick in orders from NVIDIA has actually currently made UMC accelerate its basic material items, with the business likewise having actually gone into a hot production run since September. UMC makes CoWoS basic materials such as interposers, and its production capability for these items in a center in Singapore was 3,000 pieces since September. The company is reported to be thinking about increasing this to 6,000 wafers monthly, according to unofficial reports.

Today's report Points out the essential function played by UMC and ASE in the product packaging supply chain for NVIDIA's synthetic intelligence items. According to sources, NVIDIA is preparing to diversify its product packaging supply chain, and for this objective, it has actually gotten in touch with the 2 business to likewise supply it with the product packaging innovations. While UMC is thought to supply TSMC with basic materials such as CoWoS interposers, ASE's production centers are offered to TSMC as a backup to launch a few of the pressure on its production centers.

TSMC has actually bumped up its CoWoS production capability to 15,000 wafers monthly, according to the current reports and these have actually come through device adjustments. This capability is thought to double next year, by the end of which NVIDIA need to represent 40% of TSMC's CoWoS production capability.

Market quotes have actually formerly put TSMC's CoWoS production capability at 12,000 wafers each month, so the current report shares that there has actually been an enhancement on this front. The company is likewise thought to double its product packaging capability next year, with AMD accounting for 8% of its orders. The non-TSMC product packaging supply chain can improve its production capability by 20%.

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